AN AUTOMATED CRC ENGINE |
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BibTeX: |
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@article{IJIRSTV1I1023, |
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Abstract: |
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The CRC or cyclic redundancy check is a widely used technique for error checking in many protocols used in data transmission. The main aim of this project is to design the CRC RTL generator or a tool that calculates the CRC equations for the given CRC polynomials and generates the Verilog RTL code .This block deals with the calculation of equations for standard polynomials like CRC-8, CRC-16, CRC-4, CRC-32 and CRC-64, CRC-32 and also user defined proprietary polynomial. Use PERL as the platform it also aims at having a simpler user interface and generate the RTLs for any data width and for any standard polynomial or user defined polynomial, and this design aims to be complete generic. RTLs generated by this tool are verified by System Verilog constrained random testing to make it more robust and reliable. |
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Keywords: |
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CRC-tools, HDL, PERL, RTL, VERILOG HDL. |
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