IJIRST (International Journal for Innovative Research in Science & Technology)ISSN (online) : 2349-6010

 International Journal for Innovative Research in Science & Technology

A Low Power 1MHz Fully Programmable Frequency Divider in 45nm CMOS Technology


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International Journal for Innovative Research in Science & Technology
Volume 1 Issue - 1
Year of Publication : 2014
Authors : Dabhi Rajeshkumar Ambaram ; Bharat H. Nagpara

BibTeX:

@article{IJIRSTV1I1031,
     title={A Low Power 1MHz Fully Programmable Frequency Divider in 45nm CMOS Technology},
     author={Dabhi Rajeshkumar Ambaram and Bharat H. Nagpara},
     journal={International Journal for Innovative Research in Science & Technology},
     volume={1},
     number={1},
     pages={39--46},
     year={},
     url={http://www.ijirst.org/articles/IJIRSTV1I1031.pdf},
     publisher={IJIRST (International Journal for Innovative Research in Science & Technology)},
}



Abstract:

A low power 1MHz Full programmable frequency divider in 45-nm CMOS process is presented in this paper. The divide ratio can be varied from 2400 to 2431 in a step size of 1.The divider consists of a divide-by-2 circuit, divide-by-2/3 prescaler, divide-by-32/33 prescaler, a programmable pulse-swallow counter. The post simulation results demonstrate that the divider can operate with the input frequency ranging from 2.46GHz-2.541GHz. Measured results show that programmable divider consuming only 613.39 µW at 1V power supply. The programmable frequency divider is design and simulated on Tanner EDA Tool using 45nm CMOS process technology with supply voltage 1 V.


Keywords:

Phase locked loop (PLL), True Single Phase Clocked (TSPC), Voltage control oscillator (VCO), Phase frequency detector (PFD, Tanner Tool.


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