IJIRST (International Journal for Innovative Research in Science & Technology)ISSN (online) : 2349-6010

 International Journal for Innovative Research in Science & Technology

The Proposed Full-Dadda Multiplier


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International Journal for Innovative Research in Science & Technology
Volume 4 Issue - 11
Year of Publication : 2018
Authors : Vikas Kaushik ; Himanshi Saini

BibTeX:

@article{IJIRSTV4I11031,
     title={The Proposed Full-Dadda Multiplier},
     author={Vikas Kaushik and Himanshi Saini},
     journal={International Journal for Innovative Research in Science & Technology},
     volume={4},
     number={11},
     pages={104--111},
     year={},
     url={http://www.ijirst.org/articles/IJIRSTV4I11031.pdf},
     publisher={IJIRST (International Journal for Innovative Research in Science & Technology)},
}



Abstract:

Dadda multipliers require less area and are slightly faster than Wallace tree multipliers. Among tree multipliers, Dadda multiplier is the most popular multiplier. This paper presents a new tree multiplier named Full-Dadda which has a new reduction scheme. This novel reduction scheme results in less number of bit-interconnects and less interconnect area than those in Dadda multiplier. This proposed reduction scheme is also a superior one in terms of regularity, simplicity and alternative use. This regularity and simplicity do not require any extra hardware. The comparative performance analysis of the Dadda and the Full-Dadda multipliers with different operand sizes is presented in this paper. Figures and tables are given to illustrate above advantages of the proposed multiplier.


Keywords:

Tree Multiplier, Interconnects Area, Comparative Analysis, Full Dadda, Digital Multiplier, Partial Product Reduction, Compressor, Wallace-Tree


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