BibTeX:

@article{IJIRSTV3I10006,
     title={Design and Implementation of Viterbi Encoder and Decoder on FPGA},
     author={Sanket Kadu, Rahul Bawankule, Rashmi Puri, Ashwini Baghele and Komal Shambharkar},
     journal={International Journal for Innovative Research in Science & Technology},
     volume={3},
     number={10},
     pages={30--33},
     year={},
     url={http://www.ijirst.org/articles/IJIRSTV3I10006.pdf},
     publisher={IJIRST (International Journal for Innovative Research in Science & Technology)},
}

Our project deal with designing and implementing a convolutional encoder and Viterbi decoder which are the essential block in digital communication systems using FPGA technology. Convolutional coding is a coding scheme used in communication systems including deep space communications and wireless communications. It provides an alternative approach to block codes for transmission over a noisy channel. The block codes can be applied only for the block of data. The convolution coding has an advantage over the block codes in that it can be applied to a continuous DataStream as well as to blocks of data. The motivation of this paper is to understand a Viterbi decoder by Xilinx 12.4i tools.

Convolution Encoder, Trellis Diagram, VHDL, Veterbi Decoder, FPGA