BibTeX:

@article{IJIRSTV4I1086,
     title={Comparative Analysis of Proposed Parallel Digital Multiplier with Dadda and Other Popular Multipliers},
     author={Vikas Kaushik and Himanshi Saini},
     journal={International Journal for Innovative Research in Science & Technology},
     volume={4},
     number={1},
     pages={237--240},
     year={},
     url={http://www.ijirst.org/articles/IJIRSTV4I1086.pdf},
     publisher={IJIRST (International Journal for Innovative Research in Science & Technology)},
}

There are mainly four series of Parallel Digital-Multipliers: Array, Vedic, Booth and Wallace series of multipliers. In this paper, a multiplier is proposed. This proposed multiplier has better performance than the other four types of series of multipliers. The proposed multiplier is actually a modified version of Wallace and Dadda multipliers. This paper presents a comparison of the proposed multiplier with these four types of series of multipliers. From each series, one multiplier which is the best among its series is selected for comparison by doing literature review of that series of multiplier. The comparison is in terms of delay, power and area. The selected multipliers with the proposed multiplier are implemented on front-end modeling using Verilog-HDL. For simulation, Modelsim is used and for synthesis and implementation Vivado is used. The target technology used for implementation is the FPGA, Z-board (xc7z020clg484-1).

Digital Multiplier, Parallel Multiplier, Dadda Modification, Wallace Modification, FPGA Implementation, Multiplier Comparison, Array, Vedic, Booth